On
approach
to
optimize manufacturing
of field-effect heterotransistors framework circuit of a comparator with shared
charge logic
to increase their integration rate. The
influence of mismatch-induced
stress
E.
L. Pankratov
Nizhny Novgorod State
University,
3 Gagarin avenue, Nizhny Novgorod, 603950, Russia
Nizhny Novgorod State
Technical University,
24 Minin Street, Nizhny Novgorod, 603950, Russia
The
paper is received on March 20, 2019
Abstract. In this paper we
introduce an approach to increase density of field-effect transistors framework
a circuit of a comparator with shared charge logic. Framework the approach we
consider manufacturing the comparator in heterostructure with specific
configuration: the heterostructure should consist of a substrate with one or several
epitaxial layers, which should include into itself several sections, manufactured
by using another materials. These sections in epitaxial layers should be doped
by diffusion or ion implantation. After that dopant and radiation defects
should by annealed framework optimized scheme. We also consider an approach to
decrease value of mismatch-induced stress in the considered heterostructure.
The approach based on modification of materials of heterostructure by radiation
processing during ion implantation. Framework the approach materials of
heterostructure near interface between layers of the structure could obtain
lower density. We also introduce an analytical approach to analyze mass and
heat transport in heterostructures during manufacturing of integrated circuits
with account mismatch-induced stress. The approach gives a possibility to take
into account spatial and temporal dependences of parameters of processes
(diffusion and heat diffusion coefficients, charge carriers mobility, ...) at
one time. At the same time the approach gives a possibility to take into
account nonlinearity of considered processes.
Keywords:
comparator with shared charge logic; increasing integration rate of field-effect
heterotransistors; optimization of manufacturing.
References
1.
V.I. Lachin, N.S. Savelov. Elektronika
[Electronics]. Rostov-on-Don, Feniks Publ., 2001. (In Russian)
2.
A. Polishscuk.
Programmable analog IC Anadigm: the whole range of analog electronics on a
single chip. First meeting. Sovremennaya elektronika - Modern Electronics,
2004, No. 12, PP. 8-11. (In Russian)
3.
G.
Volovich. Modern models of integrated operational amplifiers. Sovremennaya
elektronika - Modern Electronics, 2006, No. 12, PP. 10-17. (In Russian)
4.
A. Kerentsev,
V. Lanin. Constructive and technological features of MOSFET-transistors. Silovaya
elektronika - Power Electronics, 2008, No. 1, P. 34 (In Russian).
5.
A.O. Ageev, A.E. Belyaev, N.S. Boltovets, V.N.
Ivanov, R.V. Konakova, Ya.Ya. Kudrik, P.M. Litvin, V.V. Milenin, A.V. Sachenko.
Au-TiB x -n-6H-SiC Schottky barrier diodes: Specific features of charge
transport in rectifying and nonrectifying contacts. Semiconductors,
2009, Vol. 43, No. 7, PP. 865-873.
6.
Jung-Hui Tsai, Shao-Yen Chiu, Wen-Shiung Lour,
Der-Feng Guo. High-performance InGaP/GaAs pnp δ-doped heterojunction
bipolar transistor. Semiconductors, 2009, Vol. 43,
No. 7, PP. 939-942.
7.
O.V. Alexandrov, A.O. Zakhar'in, N.A. Sobolev,
E.I. Shek, M.M. Makoviychuk, E.O. Parshin. Formation
of donor centers upon annealing of dysprosium and holmium-implanted
silicon. Semiconductors, 1998, Vol. 32, No. 9, P. 921-923.
8.
I.B.
Ermolovich, V.V. Milenin, R.A. Red'ko, S.M. Red'ko. Features of recombination
processes in CdTe films fabricated at different temperature conditions of
growth and subsequent annealing. Semiconductors, 2009, Vol. 43, No. 8, PP.
1016-1020.
9.
P. Sinsermsuksakul, K. Hartman, S.B. Kim, J. Heo, L. Sun, H.H.
Park, R. Chakraborty, T. Buonassisi, R.G. Gordon. Enhancing the efficiency of SnS
solar cells via band-offset engineering with a zinc oxysulfide buffer layer. Appl.
Phys. Lett., 2013, Vol. 102, No. 5, PP. 053901-053905.
10. J.G. Reynolds, C.L. Reynolds, Jr.A. Mohanta, J.F. Muth, J.E.
Rowe, H.O. Everitt, D.E. Aspnes. Shallow acceptor complexes in p-type ZnO. Appl.
Phys. Lett., 2013, Vol. 102, No. 15, PP. 152114-152118.
11. N.I. Volokobinskaya, I.N. Komarov, T.V. Matyukhina, V.I.
Reshetnikov, A.A. Rush, I.V. Falina, A.S. Yastrebov. Semiconductors,
2001. Vol. 35, No. 8, PP. 1013-1017.
12.
E.L. Pankratov, E.A. Bulaeva. Doping of
materials during manufacture p-n-junctions and bipolar transistors. Analytical
approaches to model technological approaches and ways of optimization of
distributions of dopants. Reviews in Theoretical Science, 2013, Vol. 1, No. 1, PP. 58-82.
13. A.E. Boukili. Modeling and analysis of the effects of the
fabrication temperatures on thermal-induced stress and speed performance of
nano pMOS transistors. The international journal for computation and
mathematics in electrical and electronic engineering, 2017, Vol. 36, No. 1,
PP. 78-89.
14. S.A. Kukushkin, A.V. Osipov, A.I. Romanychev. Epitaxial zinc
oxide growth by molecular layering on SiC/Si substrates. Physics of the
Solid State, 2016, Vol. 58, No. 7, PP. 1448-1452.
15. V. Savani, N.M.
Devashrayee. Analysis and design of low-voltage low-power high-speed double
tail current dynamic latch comparator. Analog Integr. Circ. Sig. Process,
2017, Vol. 93, No. 2, PP. 287-298
16. E.L. Pankratov, E.A. Bulaeva. About some ways to decrease
quantity of defects in materials for solid state electronic devices and diagnostics
of their realization. Reviews in Theoretical Science, 2015, Vol.
3, No. 4, PP. 365-398
17. K.K.
Ong, K.L. Pey, P.S. Lee, A.T.S. Wee, X.C. Wang, Y.F. Chong. Dopant distribution
in the recrystallization transient at the maximum melt depth induced by laser
annealing. Appl. Phys. Lett., 2006, Vol. 89, No. 17, PP. 172111-172114.
18. H.T.
Wang, L.S. Tan, E. F. Chor. Pulsed laser annealing of Be-implanted GaN. J.
Appl. Phys., 2006, Vol. 98, No. 9, PP.
094901-094905.
19. Yu.V. Bykov, A.G.
Yeremeev, N.A. Zharova, I.V. Plotnikov, K.I. Rybakov, M.N. Drozdov, Yu.N.
Drozdov, V.D. Skupov. Diffusion processes in semiconductor structures during
microwave annealing. Radiophysics and Quantum Electronics, 2003, Vol. 46,
No. 8-9, PP. 749-755.
20. Y.W.
Zhang, A.F. Bower. Numerical simulations of island formation in a coherent
strained epitaxial thin film system. Journal of the Mechanics and Physics of
Solids, 1999, Vol. 47, No. 11, PP. 2273-2297.
21. L.D. Landau, E.M. Lifshits. Teoreicheskaya fizika. Tom 7. Teotiya uprugosti [Theoretical Physics. Vol. 7. Theory of Elasticity]. Moscow,
Physmatlit Publ., 2001. (In Russian)
22. Z.Yu. Gotra. Tekhnologiya mikroelektronnykh ustroistv [Technology of microelectronic devices]. Moscow, Radio i svyaz
Publ., 1991. (In Russian)
23. P.M.
Fahey, P.B. Griffin, J.D. Plummer. Point defects and dopant diffusion in
silicon. Rev. Mod. Phys.,1989, Vol. 61, No. 2, PP. 289-388.
24. V.L.Vinetskiy,
G.A.Kholodar'. Radiotsionnayafizika poluprovodnikov [Radiative physics of semiconductors]. Kiev, "Naukova Dumka"
Publ., 1979. (In Russian)
25. E.L.
Pankratov, E.A. Bulaeva. An approach to manufacture of bipolar transistors in
thin film structures. On the method of optimization. Int. J. Micro-Nano Scale Transp., 2014.
Vol. 4, No. 1, P. 17-31.
26. Yu.D. Sokolov. On the determination
of dynamic forces in mine hoisting ropes. Applied Mechanics, 1955, Vol. 1. No. 1, PP. 23-35 (In Russian)
27. E.L.
Pankratov. Impurity dynamics in the formation of p-n-junctions in
inhomogeneous structures. Optimization of annealing time. Russian Microelectronics,
2007, Vol. 36, No. 1, PP. 33-39 .
28.
E.L.
Pankratov. Redistribution of dopant during annealing of radiative defects in a
multilayer structure by laser scans for production an implanted-junction
rectifiers. Int. J. Nanoscience, 2208,
Vol. 7, No. 4-5, PP. 187-197.
29. E.L. Pankratov, E.A.
Bulaeva. Decreasing
of quantity of radiation defects in an implanted-junction rectifiers by using
overlayers. Int.
J. Micro-Nano Scale Transp., 2012, Vol. 3, No. 3, PP. 119-130.
30. E.L.
Pankratov. Synchronization
of impurities infusion for production of a sequence of diffused-junction
rectifiers. Nano,
2011, Vol. 6, No. 1, PP. 31-40
31. E.L.
Pankratov, E.A. Bulaeva. Optimization of manufacturing of field-effect
transistors framework an inverter to decrease their dimensions. J. Comp.
Theor. Nanoscience., 2013, Vol. 10, No. 4, PP. 888-893.
32. E.L.
Pankratov, E.A. Bulaeva. On prognosis of technological process to optimize
manufacturing of an invertors to increase density of their elements. Journal of Nanoengineering
and Nanomanufacturing, 2016, Vol. 6, No. 4, PP. 313-326.
For citation:
E.
L. Pankratov. On approach to optimize manufacturing of field-effect
heterotransistors framework circuit of a comparator with shared charge logic to
increase their integration rate. The influence of mismatch-induced stress. Zhurnal Radioelektroniki - Journal of Radio Electronics. 2019. No. 3. Available at