Functional modeling and synthesis of hardware cryptographic information security on a Linear Feedback Shift Register

 

A. B. Sizonenko ¹, V. V. Menshikh ²

¹ Krasnodar University of the Ministry of the Interior of the Russian Federation

² Voronezh Institute of the Ministry of the Interior of the Russian Federation

 

The paper is received on April 9, 2015

 

Abstract. Method of technical realization of a Linear Feedback Shift Register (LFSR), generating multiple elements of pseudo-random sequence in one cycle is presented. Indicators and criteria of performance of technical implementation LFSR are given and justified. The effectiveness of the modified circuit is assessed using selected indicators and criteria of performance for specific example. Algorithm simulation and synthesis of high-performance hardware cryptographic protection of information on the criterion of maximum productivity with existing limits on complexity is reduced. The mathematical apparatus of Petri nets is proposed to use for modeling high-performance technical implementation encoders, having in its composition more than one LFSR.

Keywords: modeling of information security; Linear Feedback Shift Register; parallel computing; cryptographic transformations; stream cipher.