A Noise Reduction Algorithm Suitable for Hardware Implementation

Vladimir Radenkovic,; Miodrag Temerinac,; Nikola Teslic,; Miroslav Popovic,

2003, № 10

A Noise Reduction Algorithm Suitable for Hardware Implementation

Vladimir Radenkovic¹, Miodrag Temerinac², Nikola Teslic¹, Miroslav Popovic¹

¹ University Novi Sad, Faculty Engeenering, Fruskogorska 11a, 21000 Novi Sad, Serbia & Montenegro, MNE

² Micronas GmbH, Hans Bunte Str. 9, Freiburg, Germany, Германия

Полный текст EDN MSPPTZ

Для цитирования

Radenkovic Vladimir, Temerinac Miodrag, Teslic Nikola, Popovic Miroslav A Noise Reduction Algorithm Suitable for Hardware Implementation // Журнал радиоэлектроники. – 2003. – № 10.